Low power chip by FPGA vendor

With the rise in the need for superior signal integrity and low power consumption, Altera Semiconductor India, a player in the System On Programmable Chip solutions (SOPC) and Field Programmable Gate Array (FPGA) segment, has come up with third generation FPGA with embedded serial transceiver.

This new FPGA comes with a complete programmable solution for applications and protocols requiring high speed transceivers. This 90 nm FPGA called Stratix II GX comes with 20 low power transceivers that operate between 622 Mbps and 6.375 Gbps.

"This is based on the customer requirements and future protocol roadmap," said Gangatharan Gopal, Field Application Engineering Manager.

The company by combining its tranceiver technology with a programmable array wants to address the needs of serial-communication protocols. This device will cover the market "sweet spot" with an operating range of 622 Mbits/ second to 6.735 Gbits/ second.

On the software side, Altera has a Matlab-based module that lets engineers simulate transceiver parameters.

This is particularly useful to those making the leap from Peripheral Component Interconnect (PCI is a primary way of adding devices to computers) to serial.

Altera will start the volume production of this third generation Stratix II GX chip by the first quarter of 2006. The vendor base for the company in India is equally divided between communication technology companies and Electronic Design Automation (EDA) companies.