Time to plug chip design gap as Semicon 2.0 seeks to boost startups
A new scheme seeks to encourage startups to step up their semiconductor designing business. Some provisions are a bit challenging
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India is home to 20 per cent of global chip design engineers. But most of them work for global fabless companies like Qualcomm, Mediatek and Nvidia. These firms have massive research and development centres in the country, working on complex technologies, but most patents stay in their headquarters. On the other hand, there are over 372 homegrown semiconductor chip design startups, according to Tracxn, but only 11 per cent of them are funded by venture capital funds (VCs), so most have no choice but to bootstrap themselves. The numbers are stark. VC investment in this space since 2023 till date was a mere $161 million across 37 rounds — an average of $4.35 million. In 2025, global investment in chip designing startups was pegged at $12.2 billion. India’s share was a miniscule 0.2 per cent. This week the Ministry of Electronics and Information Technology (Meity) looked to address this anomaly. It has come out with a detailed notification under the ₹1.27 trillion Semicon 2.0 scheme, which overhauled a 2021 design linked incentive (DLI) scheme. Addressing critics Under it, for the first time, the government has offered to co-invest in startups with VCs if they want funds beyond the limit set earlier for each successful application — which was a paltry ₹15 crore (around $1.5 million) or 50 per cent of eligible expenditure (project cost) incurred on semiconductor design. Critics of the earlier scheme had said the cap was too low as designing even a basic chip could cost more than $10 million. The new scheme also seeks to take care of mid-size and larger Indian companies which had been ignored earlier. Apart from the government co-investing with VCs in such companies, the scheme introduces support through royalty financing. Under this, the government gives the company a lump sum to help it launch a product. The company, in return, gives a 5 per cent royalty on net revenue from the product up to 1.5 times the financial support. Meity hopes that the 2.0 scheme will help nurture over 100 fabless semiconductor companies — which effectively means a fourfold increase in the total number of players that it has already committed to funding. Is that doable? Some stakeholders have already pointed to problems with the new scheme. One is a condition stipulating that the Centre for Development of Advanced Computing (CDAC) — an R&D centre that is part of Meity — will co-own the intellectual property (IP) of the chip design with the company. Govt control vs markets Neil Shah, co-founder of Counterpoint Research, said: “The fundamental gap in the Indian Semiconductor Mission (ISM) 2.0 is the clash between government control and global deep-tech market realities. Mandating CDAC co-ownership in critical silicon and barring cross-border IP with domestic lock-in risks alienating top global venture capital. Indian fabless startups cannot do global cross-border licensing, clean spin-outs, or mergers and acquisitions. This directly limits their growth and scaling opportunities.” Shah said that in the US, by contrast, the CHIPS Act, meant to incentivise the semicon industry, does not claim ownership of a company’s IP or commercial products even though it sets sovereignty and security fences around critical IPs. Another concern is about a 9 per cent deployment-linked incentive offered on sales of chips for five years with a cap of ₹30 crore per player. Critics say this only subsidises the cost of supplying the chips but does not help in getting buyers. That is because for buyers switching away from global vendors like Qualcomm, NXP, and ST Micro electronics to new players leads to massive retesting costs and high chances of failure. The scheme has its supporters too. Anjan Ray, investment partner in Navam Capital which has invested in chip design, said: “Semicon 2.0 will give a superb boost to the sector across the spectrum from innovation to capacity building. It will derisk investments in the sector substantially but will also drive up valuations of companies.” Mismatch But homegrown chip design companies face tough challenges. One big challenge is the mismatch between the kind of semiconductor chips being designed by the startups and the requirement of the market – not only in India but globally. “Startups need to have a compelling product, not a ‘me-too’,” said Jaswinder Ahuja, former corporate vice president, international headquarters, Cadence Design Systems which provides tools for designing chips. He is a member of the ISM advisory committee. “You can’t go and say we are designing a chip which is 10 per cent more efficient than an existing one in the market and hope to find a buyer — because you are new, without a proven track record, so they will not shift from their existing vendors. Or saying we are making a chip design for the Indian market. That is not good enough — it should sell globally.” There are some markets that are opening up due to regulatory interventions. Ahuja said one big area is CCTV cameras, where the government has restricted the import of uncertified internet-connected cameras (mostly Chinese) due to security concerns. This has created a huge market potential for over 2 million “designed in India” chips per year. One company joining this bandwagon is Ahmedabad-based IndieSemiC, which plans to capture at least 5 per cent of this market initially with an aim to hit 20 per cent. The bootstrapped chip design company is, for the first time, looking to raise funds, and that is never easy. Chicken and egg Founder Nikul Shah said: “The chip which we are building will cost us ₹400-500 crore. We have got the expensive electronic design automation tools from the government under the DLI scheme. But it’s a ‘chicken-and-egg’ problem. Investors demand secured customers before a chip is built, but customers are unwilling to commit until the chip is ready.” Shah is scouting for “patient capital” with a seven to ten year outlook rather than the two to three year horizon most investors prefer. It plans to send out the design for manufacturing by Global Foundries in Singapore. It has also tied up with Kaynes Semicon, a plant in Gujarat to churn out the chips in two to three years. Conventional private equity funds, however, are chary about putting in their money. “We will prefer to wait and see and put in substantial checks when the companies are at the growth stage with a clear certified product and buyer. Not before; we have a much smaller time schedule for our returns,” said a top executive of a US-based fund. Getting the right talent for chip design startups is also proving to be difficult, said Ravi Jain, investment director in TDK Ventures which has invested in the space. “Global captives are delivering golden handcuffs to young techies at the beginning of their careers – the AI boom has led to escalated salaries and stock options, leaving them with no commercial incentive to join startups or jump out and set them up.” Some chip design companies have sold off quickly because there is no ecosystem in India to build them up. c2i Semiconductors, one of the startups which was supported by the DLI scheme, was sold within less than two years — just a few days ago — to global giant Infineon. The company had built a solution to tackle the guzzling of power by servers powered by GPUs for AI. Jain, who exited from c2i with the founders recently said: “The ecosystem did not exist in India for them to sell to global behemoths in the US from India. They required techno-commercial experts and specialised labs for global buyers to test their products in the US, which would have taken two years or more to build. Infineon and some other companies already had the ecosystem — they were willing to buy.” No ecosystem The lack of an ecosystem is a serious stumbling block for chip design players — it’s difficult to design chips without a fab plant in the country (a Tata fab is set to come up only in mid-2018). Global fab companies, which have lead times of 12-18 months or less, charge a hefty premium for small volume orders from startups. But despite the problems it is clear that the government has made a big bet to push the chip design agenda to the forefront with Semicon 2.0. Without a vibrant homegrown chip design play powering the semiconductor ecosystem — from fabs to plants and then consumers and electronic products — India’s ambitious dream of becoming a top-five global semicon player will be difficult if not impossible to attain.
Topics : semiconductor start- ups