SCL fabricates 20 indigenous semiconductor chips designed by students

36 more chips designed by students in the pipeline

The Semiconductor Lab (SCL) at Mohali has completed the fabrication of 20 semiconductor chips designed by students from across 17 Indian engineering institutes, including the Indian Institute of Technology at Jammu and Indore, sources said.

 

These chips are now ready for tape-out and will soon be tested, the sources told Business Standard.

 

In addition to these, 36 more chips designed in India by students are at various stages of fabrication at SCL, and are likely to be ready for tape-out in the next six months, they added.

 

SCL Mohali had started offering end-to-end fabrication, testing and packaging support for chip design startups late in 2024.

The end-to-end fabrication of these India-designed chips at the facility assumes significance since most of the chips designed by such institutes had to earlier approach global foundry giants, which often delayed their work owing to prior commercial commitments.

 

“Apart from the delayed timelines, the costs are high for these startups, which are often not very well-funded. And then due to the physical absence of these foundries in India, the startups had limited ability for testing, analysis and identifying challenges in their design within a short time period,” an official from the Ministry of Electronics and Information Technology, said.

 

Additionally, nearly 50 more semiconductor chips are at different stages of being designed in institutes of higher education across the country, another official said. 

 

These initiatives are being taken under the India Semiconductor Mission’s chips-to-startups (C2S) programme and design linked incentive (DLI) scheme, a senior government official said. The central government has established a ChipIN Centre at the Centre for Development of Advanced Computing to provide chip design training, tools, and fabrication and testing resources to the semiconductor design community across the country. It also offers access to advanced tools for designing chips — including at the 5nm level — and supports the fabrication and packaging of designs at foundries in India and abroad.

 

“Once the designs are received from the institutions, the ChipIN Centre integrates them into a single chip layout (reticle) after performing fabrication compliance checks and verifying their readiness for fabrication. This reduces cost and effort, making the chip design and fabrication process more efficient, resulting in a large number of designs fabricated by students in an efficient manner,” an official said on the basis of anonymity.

 

The approach is a shuttle system, where various tasks are completed at different stops depending on the strength of each institution, the official said.

 

“These are multi-project wafer (MPW) shuttles. The first MPW shuttle, which took design from the institutes and finished fabrication at SCL, was started in December 2024, following which the next two MPW shuttles took off in April and earlier this month,” the official said. Under the DLI scheme, design projects from 22 companies have been approved, with a total project cost of ₹690 crore and a government commitment of ₹233.97 crore. In total, these companies have raised ₹383.37 crore in equity investment from venture capital firms, with about ₹100 crore of investment under final stages of conclusion since the DLI Scheme was launched in 2022, an official quoted above said. 

 

Under the DLI and C2S programmes, about 72 companies have been approved to use Electronic Design Automation (EDA) tools for designing semiconductor chips.

 

Firms such as Synopsys, Cadence Design Systems, Siemens, Ansys, Keysight Technologies, and SILVACO provide EDA tools.

Meanwhile, AMD and Renesas provide hardware boards to the DLI-selected

companies, as well as the C2S startups.

 

Siemens also provides the emulation platform for chip validation, the official said.